This article contains a growing collection of resources on FPGA bitstream formats and toolchain details as I find out more about the various vendor’s implementations. It is a continuation of the article published on my old blog.
Over the past couple of years, many projects have developed open source alternatives for proprietary solutions in the IT industry. One of the last areas of proprietary domination includes reconfigurable computing chips. This technology is becoming more and more important as the advantages of FPGAs over conventional processors in speed and energy efficiency become evident.
Even Microsoft has been testing FPGAs to accelerate their Bing search engine.
While there is a wide range of tools available to program the many flavors of microcontrollers like AVR, PIC and Parallella (which happens to be a completely open design), and to flash BIOS chips, similar capabilities are missing in the open source world for field-programmable gate arrays, or FPGAs.
Tools to develop and compile the necessary VHDL or Verilog code to be run on FPGAs are already available, such as Icarus or GHDL.
In order to use the compiled code with an actual FPGA, each vendor has their own tools:
Xilinx offers the free XSE Webpack, Altera seems to have at least a partly open source tool called STAPL (Standard Test and Programming Language), yet to flash the resulting binary code, further proprietary tools are needed.
Lattice Semiconductor, which offers a board to use with the Raspberry Pi computer, is doing the community a huge favor by providing access to affordable hardware.
urjtag.org supports various bitstream formats as well as JTAG adapters, and is under active development. STAPL, however, is not yet supported by urjtag. For now, binaries and source code for a STAPL compiler and player are available from Altera.
http://datenkrake.org/ddk-fpga/ references information on building a bitstream for Microsemi FPGAs.
Routing of components on the FPGA chip is a complex task that is performed within the proprietary toolchains.
There currently are two open source projects that aim to implement route-and-place routines for FPGAs: RapidSmith and VTR (Verilog-to-Routing).
Rather comprehensive information on older Xilinx FPGAs can be found on the Internet Archive, though not on the manufacturer’s site anymore: